1. Field of the Invention
The invention relates in general to a memory and a method for programming the same, and more particularly to a memory with the shortened memory programming time and a method for programming the same.
2. Description of the Related Art
At present, memories may be used in various occasions for storing data. The memories may be classified into various types including, for example, a multi-level cell (MLC) memory. FIG. 1A (Prior Art) is a schematic illustration showing a conventional multi-level cell 100. Referring to FIG. 1A, the multi-level cell 100 includes a left half cell 110 and a right half cell 120. Each of the half cells of the multi-level cell 100 may have many bits according to the threshold voltage distribution.
Description will be made by taking each half cell having two bits as an example. FIG. 1B (Prior Art) shows the distribution of threshold voltages of the multi-level cell 100. As shown in FIG. 1B, the threshold voltage distributions of the left half cell 110 and the right half cell 120 are sequentially defined as (11, 10, 01, 00). The threshold voltage distributions in FIG. 1B have to be possibly gathered together so that the sufficient read window can be kept to prevent the threshold voltage of the right half cell 120 from influencing the threshold voltage of the left half cell 110, and thus to prevent the error from occurring when the half cells are being read.
To solve the above-mentioned problems, the left half cell 110 and the right half cell 120 have to be programmed in the single programming loop. In the conventional programming command, each bit data has a corresponding address. When 4-bit data is to-be-programmed into the multi-level cell 100, the programming command must include at least four sets of addresses and data. Consequently, the complexity of the programming command received by the memory increases, and the programming flow of the memory becomes complicated and time-consuming.